#ifndef PADL_PIN_CONNECT_BLOCK_H_
#define PADL_PIN_CONNECT_BLOCK_H_

#include "target.h"

#define padl_pincon_PINCON	((padl_pincon_PinConType *)0xE002C000)

typedef struct
{
	union{
		REGISTER RW U32 PinSel0;
		struct{
			REGISTER RW U8 pin46 : 2;
			REGISTER RW U8 pin47 : 2;
			REGISTER RW U8 pin98 : 2;
			REGISTER RW U8 pin99 : 2;
			U32 RESERVED1 : 12;
			REGISTER RW U8 pin48 : 2;
			REGISTER RW U8 pin49 : 2;
			U32 RESERVED2 : 6;
			REGISTER RW U8 pin62 : 2;
		};
	};
	union{
		REGISTER RW U32 PinSel1;
		struct{
			REGISTER RW U8 pin63 : 2;
			U32 RESERVED3 : 30;
		};
	};
	REGISTER RW U32 PinSel2;
	REGISTER RW U32 PinSel3;
	REGISTER RW U32 PinSel4;
	REGISTER RW U32 PinSel5;
	REGISTER RW U32 PinSel6;
	REGISTER RW U32 PinSel7;
	REGISTER RW U32 PinSel8;
	REGISTER RW U32 PinSel9;
	union {
		REGISTER RW U32 PinSel10;
		struct {
			U32 : 3;
			REGISTER RW BOOL ETMEnable : 1;
		}PinSel10_detailed;
	};
	U32 RESERVED0[5];
	REGISTER RW U32 PinMode0;
	REGISTER RW U32 PinMode1;
	REGISTER RW U32 PinMode2;
	REGISTER RW U32 PinMode3;
	REGISTER RW U32 PinMode4;
	REGISTER RW U32 PinMode5;
	REGISTER RW U32 PinMode6;
	REGISTER RW U32 PinMode7;
	REGISTER RW U32 PinMode8;
	REGISTER RW U32 PinMode9;
} padl_pincon_PinConType;


#define padl_pincon_PINSEL_P0_0		0
#define padl_pincon_PINSEL_RD1		1
#define padl_pincon_PINSEL_TXD3		2
#define padl_pincon_PINSEL_SDA1		3
#define padl_pincon_PINSEL_P0_1		0
#define padl_pincon_PINSEL_TD1		1
#define padl_pincon_PINSEL_RXD3		2
#define padl_pincon_PINSEL_SCL1		3
#define padl_pincon_PINSEL_P0_2		0
#define padl_pincon_PINSEL_TXD0		1
#define padl_pincon_PINSEL_P0_3		0
#define padl_pincon_PINSEL_RXD0		1
#define padl_pincon_PINSEL_P0_10		0
#define padl_pincon_PINSEL_TXD2		1
#define padl_pincon_PINSEL_SDA2		2
#define padl_pincon_PINSEL_MAT3_0	3
#define padl_pincon_PINSEL_P0_11		0
#define padl_pincon_PINSEL_RXD2		1
#define padl_pincon_PINSEL_SCL2		2
#define padl_pincon_PINSEL_MAT3_1	3
#define padl_pincon_PINSEL_P0_15		0
#define padl_pincon_PINSEL_TXD1		1
#define padl_pincon_PINSEL_SCK0		2
#define padl_pincon_PINSEL_SCK		3
#define padl_pincon_PINSEL_P0_16		0
#define padl_pincon_PINSEL_RXD1		1
#define padl_pincon_PINSEL_SSEL0		2
#define padl_pincon_PINSEL_SSEL		3



#define padl_pincon_DISABLE_ETM() \
	padl_pincon_PINCON->PinSel10_detailed.ETMEnable = FALSE;

/// Pin 46 function selection ///////////////////////////////////////////////////

// GPIO Port 0.0
#define padl_pincon_CONFIG_GPIO_P0_0()	(padl_pincon_PINCON->pin46 = padl_pincon_PINSEL_P0_0)
// CAN1 receiver input
#define padl_pincon_CONFIG_RD1()			(padl_pincon_PINCON->pin46 = padl_pincon_PINSEL_RD1)
// Transmitter output for UART3
#define padl_pincon_CONFIG_TXD3()			(padl_pincon_PINCON->pin46 = padl_pincon_PINSEL_TXD3)
// I2C1 data input/output (this is not an open-drain pin)
#define padl_pincon_CONFIG_SDA1()			(padl_pincon_PINCON->pin46 = padl_pincon_PINSEL_SDA1)
/////////////////////////////////////////////////////////////////////////////////

/// Pin 47 function selection ///////////////////////////////////////////////////

// GPIO Port 0.1
#define padl_pincon_CONFIG_GPIO_P0_1()	(padl_pincon_PINCON->pin47 = padl_pincon_PINSEL_P0_1)
// CAN1 transmitter output
#define padl_pincon_CONFIG_TD1()			(padl_pincon_PINCON->pin47 = padl_pincon_PINSEL_TD1)
// Receiver input for UART3
#define padl_pincon_CONFIG_RXD3()			(padl_pincon_PINCON->pin47 = padl_pincon_PINSEL_RXD3)
// I2C1 clock input/output (this is not an open-drain pin)
#define padl_pincon_CONFIG_SCL1()			(padl_pincon_PINCON->pin47 = padl_pincon_PINSEL_SCL1)
/////////////////////////////////////////////////////////////////////////////////

/// Pin 98 function selection ///////////////////////////////////////////////////

// GPIO Port 0.2
#define padl_pincon_CONFIG_GPIO_P0_2()	(padl_pincon_PINCON->pin98 = padl_pincon_PINSEL_P0_2)
// Transmitter output for UART0
#define padl_pincon_CONFIG_TXD0()			padl_pincon_PINCON->PinSel0 &= ~(0x03 << 4);padl_pincon_PINCON->PinSel0 |= (padl_pincon_PINSEL_TXD0 << 4);
/////////////////////////////////////////////////////////////////////////////////

/// Pin 99 function selection ///////////////////////////////////////////////////

// GPIO Port 0.3
#define padl_pincon_CONFIG_GPIO_P0_3()	(padl_pincon_PINCON->pin99 = padl_pincon_PINSEL_P0_3)
// Receiver input for UART0
#define padl_pincon_CONFIG_RXD0()			padl_pincon_PINCON->PinSel0 &= ~(0x03 << 6);padl_pincon_PINCON->PinSel0 |= (padl_pincon_PINSEL_RXD0 << 6);
/////////////////////////////////////////////////////////////////////////////////

/// Pin 48 function selection ///////////////////////////////////////////////////

// GPIO Port 0.10
#define padl_pincon_CONFIG_GPIO_P0_10()	(padl_pincon_PINCON->pin48 = padl_pincon_PINSEL_P0_10)
// Transmitter output for UART2
#define padl_pincon_CONFIG_TXD2() padl_pincon_PINCON->PinSel0 &= ~(0x03 << 20);padl_pincon_PINCON->PinSel0 |= (padl_pincon_PINSEL_TXD2 << 20);

// I2C2 data input/output (this is not an open-drain pin)
#define padl_pincon_CONFIG_SDA2()			(padl_pincon_PINCON->pin48 = padl_pincon_PINSEL_SDA2)
// Match output for Timer 3, channel 0
#define padl_pincon_CONFIG_MAT3_0()		(padl_pincon_PINCON->pin48 = padl_pincon_PINSEL_MAT3_0)
/////////////////////////////////////////////////////////////////////////////////

/// Pin 49 function selection ///////////////////////////////////////////////////

// GPIO Port 0.11
#define padl_pincon_CONFIG_GPIO_P0_11()	(padl_pincon_PINCON->pin49 = padl_pincon_PINSEL_P0_11)
// Receiver input for UART2
#define padl_pincon_CONFIG_RXD2() padl_pincon_PINCON->PinSel0 &= ~(0x03 << 22);padl_pincon_PINCON->PinSel0 |= (padl_pincon_PINSEL_RXD2 << 22);

// I2C2 clock input/output (this is not an open-drain pin)
#define padl_pincon_CONFIG_SCL2()			(padl_pincon_PINCON->pin48 = padl_pincon_PINSEL_SCL2)
// Match output for Timer 3, channel 1
#define padl_pincon_CONFIG_MAT3_1()		(padl_pincon_PINCON->pin48 = padl_pincon_PINSEL_MAT3_1)
/////////////////////////////////////////////////////////////////////////////////

/// Pin 62 function selection ///////////////////////////////////////////////////

// GPIO Port 0.15
#define padl_pincon_CONFIG_GPIO_P0_15()	(padl_pincon_PINCON->pin62 = padl_pincon_PINSEL_P0_15)
// Transmitter output for UART1
#define padl_pincon_CONFIG_TXD1()		padl_pincon_PINCON->PinSel0 &= ~(0xC0000000);padl_pincon_PINCON->PinSel0 |= (0x40000000);
// Serial clock for SSP0
#define padl_pincon_CONFIG_SCK0()			(padl_pincon_PINCON->pin62 = padl_pincon_PINSEL_SCK0)
// Serial clock for SPI
#define padl_pincon_CONFIG_SCK()			(padl_pincon_PINCON->pin62 = padl_pincon_PINSEL_SCK)
/////////////////////////////////////////////////////////////////////////////////

/// Pin 63 function selection ///////////////////////////////////////////////////

// GPIO Port 0.16
#define padl_pincon_CONFIG_GPIO_P0_16()	(padl_pincon_PINCON->pin63 = padl_pincon_PINSEL_P0_16)
// Receiver input for UART1
#define padl_pincon_CONFIG_RXD1()		padl_pincon_PINCON->PinSel1 &= ~(0x03 << 0);padl_pincon_PINCON->PinSel1 |= (padl_pincon_PINSEL_RXD1 << 0);
// Slave Select for SSP0
#define padl_pincon_CONFIG_SSEL0()		(padl_pincon_PINCON->pin63 = padl_pincon_PINSEL_SSEL0)
// Slave Select for SPI
#define padl_pincon_CONFIG_SSEL()			(padl_pincon_PINCON->pin63 = padl_pincon_PINSEL_SSEL)
/////////////////////////////////////////////////////////////////////////////////

#endif /*PADL_PIN_CONNECT_BLOCK_H_*/
